Resistive Switching in CsPbBr3 (0D)/MoS2 (2D) Heterojunction System: Trap-Controlled Space Charge Limited Transport Mechanism Resistive Switching in CsPbBr3 (0D)/MoS2 (2D) Heterojunction System: Trap-Controlled Space Charge Limited Transport Mechanism AITranslate
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Electronic phenomena at the interfaces of mixed-dimensional systems are interesting as well as intriguing because of the distinctly differing electronic states’ spectra on both sides of the interface. In this work, we examine one such 0D/2D interface system involving two materials of great current interest, namely, a halide perovskite CsPbBr3 (CPB QDs) (0D) and a 2D chalcogenide MoS2. The choice of the materials was also based on their favorable band alignment for the targeted application. By employing simple solution-based synthetic protocols, we have found that an electronically active interface is rendered, which exhibits an impressive and robust resistive switching characteristic. The ratio of resistances in high resistance state (HRS) and low resistance state (LRS) of ∼12 is obtained, and the same is retained over 100 cycles for which the tests were performed. On the basis of detailed multiple characterizations of the materials and interfaces, we show that the memristor functionality emanates from the trap-controlled space charge limited conduction (SCLC) mechanism.
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DOI:https://doi.org/10.1021/acsaelm.2c01590
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Electronic phenomena at the interfaces of mixed-dimensional systems are interesting as well as intriguing because of the distinctly differing electronic states’ spectra on both sides of the interface. In this work, we examine one such 0D/2D interface system involving two materials of great current interest, namely, a halide perovskite CsPbBr3 (CPB QDs) (0D) and a 2D chalcogenide MoS2. The choice of the materials was also based on their favorable band alignment for the targeted application. By employing simple solution-based synthetic protocols, we have found that an electronically active interface is rendered, which exhibits an impressive and robust resistive switching characteristic. The ratio of resistances in high resistance state (HRS) and low resistance state (LRS) of ∼12 is obtained, and the same is retained over 100 cycles for which the tests were performed. On the basis of detailed multiple characterizations of the materials and interfaces, we show that the memristor functionality emanates from the trap-controlled space charge limited conduction (SCLC) mechanism.
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| GB/T 7714-2015 | [1] Akshaya Pisal Deshmukh, Kalyanee Patil, Satishchandra Ogale, et al. ACS Applied Electronic Materials, 2023(5). DOI:10.1021/acsaelm.2c01590. |
| MLA | [1] Akshaya Pisal Deshmukh, et al., ACS Applied Electronic Materials, no. 5, 2023, https://doi.org/10.1021/acsaelm.2c01590. |
| APA | [1] Akshaya Pisal Deshmukh, Kalyanee Patil, Satishchandra Ogale, & Tejashree Bhave. (2023). ACS Applied Electronic Materials(5). https://doi.org/10.1021/acsaelm.2c01590 |
| IEEE | [1] Akshaya Pisal Deshmukh, Kalyanee Patil, Satishchandra Ogale, and Tejashree Bhave, ACS Applied Electronic Materials, no. 5, 2023, doi: 10.1021/acsaelm.2c01590. keywords: {Memristor 0D/2D interface Halide perovskite 2D chalcogenide Resistive switching} |
