Robust Anti-Ambipolar Behavior and Gate-Tunable Rectifying Effect in van der Waals p–n Junctions Robust Anti-Ambipolar Behavior and Gate-Tunable Rectifying Effect in van der Waals p–n Junctions AITranslate

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DOI：https://doi.org/10.1021/acsaelm.2c01120

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Anti-ambipolar behavior has been observed in multilayer two-dimensional semiconductors and many p–n junctions. However, temperatures in the range of tens of kelvin are usually required, and there are gaps in the understanding of the underlying physics, most notably the roles of the space charge region and van der Waals (vdW) heterojunction. Here, we systematically investigate the unique transport and transfer characteristics of vertically stacked vdW contacted p-WSe2/n-SnS2 and p-WSe2/n-MoS2 junctions. Interestingly, robust anti-ambipolar behavior is observed at low and room temperature for both darkened and illuminated conditions. A peak-to-valley current ratio exceeding 104 and on-state gating field ranging from −0.3 × 106 to 0.57 × 106 V/cm are achieved at room temperature in darkness. Moreover, the rectifying effect and the type of majority charge carrier of the WSe2/SnS2 junction can be tuned by an electric gate. Robust Raman quenching over the whole interface induced by strong charge transfer is also observed. Based on an equivalent circuit model, a Poisson and drift-diffusion simulation, and experiments with local illumination, we highlight the role of the van der Waals heterojunction. We show that the observed unique anti-ambipolar behavior is due to the recombination of electrons and holes at the space charge region rather than carrier diffusion in the turned-off metal-oxide-semiconductor field-effect transistor (MOSFET). A larger vdW barrier and interface recombination at the vdW barrier are key to having a strong on/off ratio especially at room temperature. The p–n vdW heterostructure plays the roles of a complementary MOSFET connecting with a heterojunction diode, not only a ternary logic inverter but also a tunable multiple-gain amplifier in wide-range gating fields. The width of the middle logic plateau can reach 45 V in a WSe2/MoS2 junction.