Impact of the Barrier Layer on the High Thermal and Mechanical Stability of a Flexible Resistive Memory in a Neural Network Application AITranslate

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DOI：https://doi.org/10.1021/acsaelm.1c01219

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An artificial synaptic device with continuous conductance variation is essential for the hardware implementation of bioinspired neuromorphic systems. With increasing technological advancement, wearable flexible technology is gaining enormous importance in the research community. High temperature is one of the key issues in flexible technology from the fabrication and applicability aspects. In this work, we have demonstrated the performance of a complementary metal–oxide–semiconductor (CMOS)-compatible high-k material (HfO2) based flexible heterogeneous stacked resistive switching device in an artificial neural network. The device exhibited an excellent memory window (ION/IOFF) of around 1.2 × 104 with an ultralow variation (σHRS ∼ 3.95 × 10–10 S) at 500 μA current compliance. The device shows excellent mechanical and electrical stability for more than 500 DC cycles and data retention capability at 120 °C for more than 104 s without any degradation. The device can be used for multilevel cell (MLC) operation in six distinct states and can be useful for the implementation of 2-bit data storage applications. The conduction mechanism in the device was dominated by Schottky emission at the lower field region and hopping conduction at the higher field region of the high-resistance state (HRS), whereas ohmic conduction was satisfied at the low-resistance state (LRS). We have trained the device in the neural network with 96.07% accuracy as the baseline and observed the effect of conductance variation and high-temperature operation. We trained the device at a high temperature with a 95.68% off-chip training accuracy and observed the accuracy profile throughout the time. The device also possessed an excellent mechanical stability under a long-term bending stress (r = 8 mm) of over 104 s with an intact memory window. The neural accuracy was measured every 30 min with a maximum of 96.01% to observe the effect of long-term mechanical stress on the off-chip learning process.