Two-Dimensional van der Waals Material PdPSe: Investigation on Electrical Transport Two-Dimensional van der Waals Material PdPSe: Investigation on Electrical Transport AITranslate
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The unique puckered pentagonal structure of the layered semiconductor material palladium phosphorus selenide (PdPSe) has gathered attention, but its electronic performance has not been thoroughly investigated. In this study, PdPSe is synthesized via chemical vapor transport, and its thickness-dependent electrical properties are examined from 1.4 to 309 nm via the field-effect transistor (FET) measurement. The material exhibits n-type semiconducting behavior, with relatively high mobility observed at a specific thickness range, reaching up to 4.9 cm2 V–1 s–1 with a maximum on/off ratio of 2.86 × 108 at a Vds of 1 V. The transport mechanism is analyzed by calculating the Schottky barrier height (SBH) using a thermionic emission model. Temperature-dependent analysis revealed that the device has a minuscule SBH and the PdPSe FET device follows the Fowler–Nordheim tunneling model. Through drain-voltage-dependent FET characteristic analysis, an improvement in carrier mobility up to 33 cm2 V–1 s–1 is observed at a high drain voltage of 10 V. These findings provide fundamental insights into the performance of PdPSe FETs and their potential use in next-generation electronic applications based on two-dimensional (2D) materials.
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DOI:https://doi.org/10.1021/acsaelm.3c00629
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The unique puckered pentagonal structure of the layered semiconductor material palladium phosphorus selenide (PdPSe) has gathered attention, but its electronic performance has not been thoroughly investigated. In this study, PdPSe is synthesized via chemical vapor transport, and its thickness-dependent electrical properties are examined from 1.4 to 309 nm via the field-effect transistor (FET) measurement. The material exhibits n-type semiconducting behavior, with relatively high mobility observed at a specific thickness range, reaching up to 4.9 cm2 V–1 s–1 with a maximum on/off ratio of 2.86 × 108 at a Vds of 1 V. The transport mechanism is analyzed by calculating the Schottky barrier height (SBH) using a thermionic emission model. Temperature-dependent analysis revealed that the device has a minuscule SBH and the PdPSe FET device follows the Fowler–Nordheim tunneling model. Through drain-voltage-dependent FET characteristic analysis, an improvement in carrier mobility up to 33 cm2 V–1 s–1 is observed at a high drain voltage of 10 V. These findings provide fundamental insights into the performance of PdPSe FETs and their potential use in next-generation electronic applications based on two-dimensional (2D) materials.
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| GB/T 7714-2015 | [1] Sooheon Cho, Byung Joo Jeong, Kyung Hwan Choi, et al. ACS Applied Electronic Materials, 2023(5). DOI:10.1021/acsaelm.3c00629. |
| MLA | [1] Sooheon Cho, et al., ACS Applied Electronic Materials, no. 5, 2023, https://doi.org/10.1021/acsaelm.3c00629. |
| APA | [1] Sooheon Cho, Byung Joo Jeong, Kyung Hwan Choi, Bom Lee, Jiho Jeon, Sang Hoon Lee, Bum Jun Kim, JaeHyun Lee, HyungSuk Oh, Hak Ki Yu, & JaeYoung Choi. (2023). ACS Applied Electronic Materials(5). https://doi.org/10.1021/acsaelm.3c00629 |
| IEEE | [1] Sooheon Cho, Byung Joo Jeong, Kyung Hwan Choi, Bom Lee, Jiho Jeon, Sang Hoon Lee, Bum Jun Kim, JaeHyun Lee, HyungSuk Oh, Hak Ki Yu, and JaeYoung Choi, ACS Applied Electronic Materials, no. 5, 2023, doi: 10.1021/acsaelm.3c00629. keywords: {twodimensional material PdPSe fieldeffect transistor thicknessdependent property charge transport mechanism} |
