Structural and electrical characterisation of PtS from H2S-converted Pt AITranslate
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Highlights • First report of the electrical characteristics of polycrystalline PtS as a thin uniform semiconductor film, encompassing resistance and Hall-effect measurements as well as back-gated junctionless MOSFET measurements with complementary simulations. • First report of structural characterisation of a polycrystalline PtS film with high-resolution cross-sectional transmission electron microscopy (HR-XTEM). • Manufacturing-compatible process for Pt to PtS formation by thermal conversion in a gaseous H2S + H2 atmosphere with a uniform sulfur supply to the Pt surface in a 300 mm-chamber reactor designed for atomic layer deposition or chemical vapour deposition, ideal for 3D integration of materials and devices with CMOS in Beyond-CMOS and More-than-Moore technologies. • Advanced commercial-grade Sentaurus TCAD software in first-pass approximation simulations of PtS provide support to the PtS experimental observations with excellent fitting to experimental measurements. • First report of electronic structure calculations and the dielectric constant of PtS beyond the generalised Density-Functional Theory level. The Heyd-Scuseria-Ernzerhof (HSE) hybrid functional is included in the model to provide a more accurate prediction of the PtS band gap, which if realised experimentally, may suggest a lower off-current and a larger Ion/Ioff ratio for PtS Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). A manufacturing-compatible 300 mm chamber reactor for atomic layer deposition or chemical vapour deposition, and pre-fitted with H2/H2S gases that can be uniformly delivered to the wafer surface, is employed to thermally convert Pt to PtS in a H2/H2S gaseous atmosphere for 7 hours at a chamber temperature of 550 °C. Prior to conversion, platinum layers 5 nm thick are uniformly deposited by electron beam evaporation onto ∼30 nm of amorphous aluminium sesquioxide deposited by atomic layer deposition on, (a) p-type silicon, and (b) c-plane sapphire. Structural characterisation is performed by high-resolution cross-sectional transmission-electron microscopy, scanning-electron microscopy and Raman spectroscopy, confirming the formation of continuous films of polycrystalline platinum monosulfide (PtS) with a ∼15 nm thickness. Electrical characterisation is performed by 4-point resistivity and Hall-effect transport measurements on van der Pauw structures of PtS on aluminium sesquioxide on c-plane sapphire, and by back-gate junctionless MOSFET device measurements for PtS on aluminium sesquioxide on p-type silicon, showing that PtS behaves as a semiconductor with a mobility of ∼16 cm2/V.s and with an n-type carrier concentration of ∼1.2 × 1015 cm−3. Advanced commercial-grade Sentaurus simulations, alongside density-functional theory calculations, agree well with the experimental observations and suggest a large bandgap of ∼1.58 eV may be possible that could lead to a low off-current and a high Ion/Ioff ratio, suggesting that PtS may be an advanced material candidate for future device integration with CMOS and for 3D integration applications in Beyond-CMOS and More-than-Moore technologies. Graphical abstract Download : Download high-res image (242KB) Download : Download full-size image
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DOI:https://doi.org/10.1016/j.apmt.2021.101163
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Highlights • First report of the electrical characteristics of polycrystalline PtS as a thin uniform semiconductor film, encompassing resistance and Hall-effect measurements as well as back-gated junctionless MOSFET measurements with complementary simulations. • First report of structural characterisation of a polycrystalline PtS film with high-resolution cross-sectional transmission electron microscopy (HR-XTEM). • Manufacturing-compatible process for Pt to PtS formation by thermal conversion in a gaseous H2S + H2 atmosphere with a uniform sulfur supply to the Pt surface in a 300 mm-chamber reactor designed for atomic layer deposition or chemical vapour deposition, ideal for 3D integration of materials and devices with CMOS in Beyond-CMOS and More-than-Moore technologies. • Advanced commercial-grade Sentaurus TCAD software in first-pass approximation simulations of PtS provide support to the PtS experimental observations with excellent fitting to experimental measurements. • First report of electronic structure calculations and the dielectric constant of PtS beyond the generalised Density-Functional Theory level. The Heyd-Scuseria-Ernzerhof (HSE) hybrid functional is included in the model to provide a more accurate prediction of the PtS band gap, which if realised experimentally, may suggest a lower off-current and a larger Ion/Ioff ratio for PtS Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs). A manufacturing-compatible 300 mm chamber reactor for atomic layer deposition or chemical vapour deposition, and pre-fitted with H2/H2S gases that can be uniformly delivered to the wafer surface, is employed to thermally convert Pt to PtS in a H2/H2S gaseous atmosphere for 7 hours at a chamber temperature of 550 °C. Prior to conversion, platinum layers 5 nm thick are uniformly deposited by electron beam evaporation onto ∼30 nm of amorphous aluminium sesquioxide deposited by atomic layer deposition on, (a) p-type silicon, and (b) c-plane sapphire. Structural characterisation is performed by high-resolution cross-sectional transmission-electron microscopy, scanning-electron microscopy and Raman spectroscopy, confirming the formation of continuous films of polycrystalline platinum monosulfide (PtS) with a ∼15 nm thickness. Electrical characterisation is performed by 4-point resistivity and Hall-effect transport measurements on van der Pauw structures of PtS on aluminium sesquioxide on c-plane sapphire, and by back-gate junctionless MOSFET device measurements for PtS on aluminium sesquioxide on p-type silicon, showing that PtS behaves as a semiconductor with a mobility of ∼16 cm2/V.s and with an n-type carrier concentration of ∼1.2 × 1015 cm−3. Advanced commercial-grade Sentaurus simulations, alongside density-functional theory calculations, agree well with the experimental observations and suggest a large bandgap of ∼1.58 eV may be possible that could lead to a low off-current and a high Ion/Ioff ratio, suggesting that PtS may be an advanced material candidate for future device integration with CMOS and for 3D integration applications in Beyond-CMOS and More-than-Moore technologies. Graphical abstract Download : Download high-res image (242KB) Download : Download full-size image
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| GB/T 7714-2015 | [1] Scott Monaghan, Emma M. Coleman, Lida Ansari, et al. Applied Materials Today, 2021(25). DOI:10.1016/j.apmt.2021.101163. |
| MLA | [1] Scott Monaghan, et al., Applied Materials Today, no. 25, 2021, https://doi.org/10.1016/j.apmt.2021.101163. |
| APA | [1] Scott Monaghan, Emma M. Coleman, Lida Ansari, Jun Lin, Alexandra Buttimer, Patrick A. Coleman, James Connolly, Ian M. Povey, Bryan Kelleher, Cormac Ó Coileáin, Niall McEvoy, Paul K. Hurley, & Farzan Gity. (2021). Applied Materials Today(25). https://doi.org/10.1016/j.apmt.2021.101163 |
| IEEE | [1] Scott Monaghan, Emma M. Coleman, Lida Ansari, Jun Lin, Alexandra Buttimer, Patrick A. Coleman, James Connolly, Ian M. Povey, Bryan Kelleher, Cormac Ó Coileáin, Niall McEvoy, Paul K. Hurley, and Farzan Gity, Applied Materials Today, no. 25, 2021, doi: 10.1016/j.apmt.2021.101163. keywords: {PtS;H2S;Manufacturability;Electrical Characterisation;DFT;TCAD} |
