Sputtered Electrolyte-Gated Transistor with Temperature-Modulated Synaptic Plasticity Behaviors Sputtered Electrolyte-Gated Transistor with Temperature-Modulated Synaptic Plasticity Behaviors AITranslate

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DOI：https://doi.org/10.1021/acsaelm.2c00395

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Temperature has always been considered as an essential factor for almost all kinds of semiconductor-based electronic components. In this work, temperature-dependent synaptic plasticity behaviors, which are mimicked by the indium–gallium–zinc oxide thin-film transistors gated with sputtered SiO2 electrolytes, have been studied. With the temperature increasing from 303 to 323 K, the electrolyte capacitance decreases from 0.42 to 0.11 μF cm–2. The mobility increases from 1.4 to 3.7 cm2 V–1 s–1, and the threshold voltage negatively shifts from −0.23 to −0.51 V. Synaptic behaviors under both a single pulse and multiple pulses are employed to study the temperature dependence. With the temperature increasing from 303 to 323 K, the post-synaptic current (PSC) at the resting state increases from 1.8 to 7.3 μA. Under a single gate pulse of 1 V and 1 s, the PSC signal altitude and the PSC retention time decrease from 2.0 to 0.7 μA and 5.1 × 102 to 2.5 ms, respectively. A physical model based on the electric field-induced ion drifting, ionic–electronic coupling, and gradient-coordinated ion diffusion is proposed to understand these temperature-dependent synaptic behaviors. Based on the experimental data on individual transistors, temperature-modulated pattern learning and memorizing behaviors are conceptually demonstrated. The in-depth investigation of the temperature dependence helps pave the way for further electrolyte-gated transistor-based neuromorphic applications.